VDLAB: abordagem baseada em gêmeos digitais para laboratório virtual de sistemas embarcados

Abstract

This work is about the development of the software project VDLAB (Virtual Digital Laboratory) seeking to obtain a product in which it will allow the programming and learning of the Field-Programmable Gate Array (FPGA) boards or boards with array of programmable gates, focusing on the use of applied virtual commands the DE2 and DE-115 TERASIC boards, so that the system user can configure an entire environment in ’.vhdl’ language or ’.bdf’ diagrams on Intel’s official development platforms (QUARTUS II), so that, when uploading the programmable file ’.sof’, the system will program a board that is inhabited in a laboratory and controlled remotely by the application server, thus proposing a visual feedback of the board’s operation, together with a virtual control panel in which the user can execute several commands and monitor the development and operation of their programs on the FPGA board.