Arquitetura de NoC tolerante a falhas com compartilhamento de roteadores

Abstract

With the evolution of the CMOS technology and the increase of integrated circuits density, the failure probability and faulty rate has increased in a sizeable manner. For this reason, it became necessary to incorporate fault tolerance at the design time in integrated circuits project, especially in complex projects like Network-on-chip ones. In this work, we present a NoC design, with a low impact solution for permanent fault tolerance, where faulty routers become a switch, while the local processor connects to the neighbor routers, so the network can keep working even under faults. To this, we modeled a NoC at the TLM (Transaction-level Modeling) level, using SystemC library, and run some network latency tests at different faulty scenarios, identifying key points for our solution on the tolerating faults.